1/10 L4979D l4979md february 2002 this is preliminary information on a new product now in development. details are subject to change without notice. n operating dc supply voltage range 6v to 31v n transient supply voltage up to 40v n low quiescent current consumption less than 20 m a with enable low n high precision output voltage (2%) n low dropout voltage less than 0.5v n reset circuit sensing the output voltage down to 1v n programmable reset pulse delay with external capacitor n watchdog n programmable watchdog timer with external capacitor n thermal shutdown and short circuit protection n wide temperature range (t j = -40c to 150c) description l4979 is a family of low dropout linear regulators with microprocessor control functions such as power on re- set, low voltage reset, watchdog timer, on-off control or enable. in addition, only low value ceramic capacitor is required for stability (above or equal to 100nf). maximum quiescent current is 20 m a at all output current equal 0 and enable low. typical quiescent current is 1.5ma at output current equal to 5ma, 3ma at output current equal to 150ma, and drops to 10ma in "not enabled" mode. on chip trimming results in high output voltage accu- racy (2%). accuracy is kept over wide temperature range, line variation, load variation. the maximum input voltage is 40v. the maximum output current is 200ma. output current is internally limited. internal temperature protection disables volt- age regulator at overtemperature. so8 so20 ordering numbers: L4979D l4979md product preview low drop voltage regulator block diagram voltage reference reset watchdog vs vi wi vcw vcr ctr ctw res en gnd vo co 5v/3.3v, 150 ma
l4979md L4979D 2/10 pin function pins connection so8 n so20 n pin name function 1 1 en voltage regulator enable 2 4, 5, 6, 15, 16 gnd ground 3 7 res reset output 4 10 vcr reset timing adjust 5 11 vcw watchdog timer adjust 6 14 wi watchdog input 7 17 vo voltage regulator output 8 20 vs supply voltage 2, 3, 8, 9, 12, 13, 18, 19 n. c. not connected en gnd res vcr vcw wi v o v s 1 3 2 4 6 5 7 8 so8 en n.c. n.c. gnd gnd res gnd n.c. n.c. n.c. n.c. wi gnd gnd v o n.c. n.c. v s 1 3 2 4 5 6 7 8 9 18 17 16 15 14 12 13 11 19 10 20 vcr wcw d00at457 so8 so20
3/10 l4979md L4979D absolute maximum ratings stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at any condition above those indicated in the operational section of this specification is n ot implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal data (*) with 6 sq. cm on board heat sink electrical characteristcs (v s = 5.6v to 31v, t j = -40c to +150c unless otherwise specified) symbol parameter value unit vvsdc dc operating supply voltage 31 v vvstr transient operating supply voltage (t<400ms) -0.3 to 40 v ivsdc input current internally limited vvo dc output voltage -0.3 to 5.5 v ivo dc output current internally limited vwi watchdog input voltage -0.3 to 7 v vod open drain output voltage (res) -0.3 to 7 v iod open drain output current (res) internally limited vcr reset delay voltage -0.3 to 7 v vcw watchdog delay voltage -0.3 to 7 v ven enable input voltage -0.3 to 40 v tj junction temperature -40 to 150 c vesd esd voltage level (hbm-mil std 883c) +/- 2 kv symbol parameter value unit r th j-amb thermal resistance junction to ambient (so8) 130-180 c/w r th j-amb thermal resistance junction to ambient (so12+4+4) 50 (*) c/w pin symbol parameter test condition min. typ. max. unit general v s , v o i q quiescent current v s = 13.5v, i o =150ma, enable high all i/o currents=0 36ma v s , v o i q quiescent current v s = 13.5v, i o = 0ma, enable high all i/o currents = 0 1.53ma v s , v o i q quiescent current v s = 13.5v, i o = 0ma, enable low all i/o currents = 0 20 m a t w thermal protection temperature 150 190 c t w_hy thermal protection temperature hysteresis 10 c
l4979md L4979D 4/10 5v voltage regulator v o v o_ref output voltage v s = 5.6 to 31v i o = 1 to 150ma 4.90 5.00 5.10 v v o i lim output current limitation v s = 13.5v 200 300 400 ma v s , v o v line line regulation voltage v s = 5.6 to 31v i o = 1 to 150ma 25 mv v o v load load regulation voltage i o = 1 to 150ma 25 mv v s , v o v dp drop voltage i o = 150ma 300 500 mv v s , v o svr ripple rejection f r = 100 hz 55 db 3.3v voltage regulator v o v o_ref output voltage v s = 5.6 to 31v i o = 1 to 150ma 3.23 3.30 3.37 v v o i lim output current limitation v s = 13.5v 200 300 400 ma v s , v o v line line regulation voltage v s = 5.6 to 31v i o = 1 to 150ma 25 mv v s , v o v dp drop voltage i o = 150ma 500 1000 mv v o v load load regulation voltage i o = 1 to 150ma 25 mv v s , v o svr ripple rejection f r = 100 hz 55 db reset (5v) r es v res_l reset output low voltage r ext = 5k w to vo, vo > 1v 0.4 v r es i res_h reset output high leakage current v res = 5v 1 m a r es r _p_u pull up internal resistance with respect to v o 15 30 50 k w r es v o_th v o out of regulation threshold v s = 5.6 to 31v i o = 1 to 150ma 6% below v o_ref 8% below v o_ref 10% below v o_ref v cr v rhth reset timing high threshold v s = 13.5v 10% v o_ref 13% v o_ref 16% v o_ref v cr v rlth reset timing low threshold v s = 13.5v 44% v o_ref 47% v o_ref 50% v o_ref v cr i cr charge current v s = 13.5v 8 17.6 30 m a v cr i dr discharge current v s = 13.5v 8 17.6 30 m a r es t rr reset reaction time see fig. 2 4 10 30 m s r es t rd reset pulse delay v s = 13.5v, c tr = 1nf 65 150 ms pin symbol parameter test condition min. typ. max. unit electrical characteristics (continued)
5/10 l4979md L4979D reset (3.3v) r es v res_l reset output low voltage r ext = 5k w to v o , v o > 1v 0.4 v r es i res_h reset output high leakage current v res = 5v 1 m a r es r _p_u pull up internal resistance with respect to v o 15 30 50 k w r es v o_th vo out of regulation threshold v s = 5.6 to 31v i o = 1 to 150ma 6% below v o_ref 8% below v o_ref 10% below v o_ref v cr v rhth reset timing high threshold v s = 13.5v 10% v o_ref 13% v o_ref 16% v o_ref v cr v rlth reset timing low threshold v s = 13.5v 44% v o_ref 47% v o_ref 50% v o_ref v cr i cr charge current v s = 13.5v 8 17.6 30 m a v cr i dr discharge current v s = 13.5v 8 17.6 30 m a r es t rr reset reaction time see fig. 2 3 7.5 20 m s r es t rd reset pulse delay v s = 13.5v, c tr = 1nf 40 65 100 ms watchdog (5v) w i v ih input high voltage v s = 13.5v 3.5 v w i v il input low voltage v s = 13.5v 1.5 v w i v ih input hysteresis v s = 13.5v 100 mv w i i i pull down current v s = 13.5v 10 m a v cw v whth high threshold v s = 13.5v 2.20 2.35 2.50 v v cw v wlth low threshold v s = 13.5v 0.50 0.65 0.80 v v cw i cwc charge current v s = 13.5v, v cw = 0.1v 4 8 14 m a v cw i cwd discharge current v s = 13.5v, v cw = 2.5v 1.0 2.13 4.5 m a v cw t wop watchdog period v s = 13.5v, c tw = 47nf 20 48 80 ms r es t wol watchdog output low time v s = 13.5v, c tw = 47nf 5 10 18 ms watchdog (3.3v) w i v ih input high voltage v s = 13.5v 2.3 v w i v il input low voltage v s = 13.5v 1 v w i v ih input hysteresis v s = 13.5v 50 mv w i i i pull down current v s = 13.5v 10 m a pin symbol parameter test condition min. typ. max. unit electrical characteristics (continued)
l4979md L4979D 6/10 voltage regulator voltage regulator uses a pchannel transistor as a regulating element. with this structure very low dropout volt- age at current up to 150ma is obtained. the output voltage is regulated up to transient input supply voltage of 40v. no functional interruption due to over-voltage pulses is generated. the high precision of the output voltage is obtained with a pre-trimmed reference voltage. a short circuit protection to gnd is provided. reset the reset circuit supervises the output voltage v o . the v o_th reset threshold is defined with the internal refer- ence voltage and a resistor output divider. if the output voltage becomes lower than vo_th then res goes low with a reaction time trr. if the output voltage becomes lower than 2.0v (typ) than res goes immediately low. the reset low signal is guaranteed for an output voltage v o greater than 1v. when the output voltage becomes higher than v o_th then res goes high with a delay t rd . this delay is obtained by an internal oscillator. oscillator period is given by where: i cr is an internally generated charge current, v cw v whth watchdog timing high threshold v s = 13.5v 1.45 1.55 1.65 v v cw v wlth watchdog timing low threshold v s = 13.5v 0.30 0.45 0.55 v v cw i cwc charge current v s = 13.5v, v cw = 0.1v 4 8 14 m a v cw i cwd discharge current v s = 13.5v, v cw = 2.5v 1.0 2.13 4.5 m a v cw t wop watchdog period v s =13.5v, c tw = 47nf 13 32 54 ms r es t wol watchdog output low time v s = 13.5v, c tw = 47nf 3.0 6.5 11.0 ms enable (5v) e n v en_l enable input low voltage 2.1 v e n v en_h enable input high voltage 3.4 v e n v en_hy enable input hysteresis 0.25 v e n i _leak pull down current e n = 5v 5 20 40 m a enable (3.3v) e n v en_l enable input low voltage 2.0 v e n v en_h enable input high voltage 2.7 v e n v en_hy enable input hysteresis 0.2 v e n i _leak pull down current e n = 5v 5 20 40 m a pin symbol parameter test condition min. typ. max. unit t osc v rhth v rlth C () c tr [] i cr ----------------------------------------------------- - v rhth v rlth C () c tr [] i cd ----------------------------------------------------- - + = electrical characteristics (continued)
7/10 l4979md L4979D i cd is an internally generated discharge current, v rhth and vrlth are two voltages defined with the output voltage and a resistor output divider, c tr is an external capacitance, t rd is given by t rd = 512 x t osc figure 1. reset time diagram. watchdog a connected microcontroller is monitored by the watchdog input w i . if pulses are missing, the watchdog out- put w o is set to low. the pulse sequence time can be set within a wide range with the external capacitor c tw . the watchdog circuit discharges the capacitor c tw with the constant current i cwd . if the lower threshold v wlth is reached, a watchdog reset is generated. to prevent this the microcontroller must generate a positive edge dur- ing the discharge of the capacitor before the voltage has reached the threshold v wlth . in order to calculate the minimum time t during which the microcontroller must output the positive edge the following equation can be used: (v whth - v wlth ) x c tw = i cwd x t every w i positive edge switches the current source from discharging to charging, the same happens when the lower threshold is reached. when the voltage reaches the upper threshold v whth the current switches from charging to discharging. the result is a saw toothvoltage at the watchdog timer capacitor c tw . figure 2. watchdog time diagram trr < trr trd = 512 tosc to s c vrhth vrlth res vcr vo wi vout_th res vcw wi vwlth vwhth twol twop
l4979md L4979D 8/10 dim. mm inch min. typ. max. min. typ. max. a 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033 b 0.35 0.48 0.014 0.019 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.020 c1 45 (typ.) d (1) 4.8 5.0 0.189 0.197 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f (1) 3.8 4.0 0.15 0.157 l 0.4 1.27 0.016 0.050 m 0.6 0.024 s8 (max.) (1) d and f do not include mold flash or protrusions. mold flash or potrusions shall not exceed 0.15mm (.006inch). so8 outline and mechanical data
9/10 l4979md L4979D 11 0 11 20 a e b d e l k h a1 c so20mec h x 45? so20 dim. mm inch min. typ. max. min. typ. max. a 2.35 2.65 0.093 0.104 a1 0.1 0.3 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 12.6 13 0.496 0.512 e 7.4 7.6 0.291 0.299 e 1.27 0.050 h 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 l 0.4 1.27 0.016 0.050 k 0? (min.)8? (max.) outline and mechanical data
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics a 2002 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan -malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com 10/10 l4979md - L4979D
|
